FAULT-TOLERANT DESIGN FOR CONTINUOUS REAL-TIME MONITORING AND MODULATION OF THE HUMAN BRAIN
1 online resource (93 pages) : PDF
University of North Carolina at Charlotte
An era of brain implantable devices has been ushered in recent years. These devices are currently being used to treat neurological disorders such as Parkinson's depression and epilepsy and are increasingly being proposed for a wide range of neurological and neuropsychiatric disorders including chronic-pain and post-traumatic stress disorder. Given the seriousness of these brain disorders the accurate operation of these brain implantable devices is critical to the well-being of a patient. For example, a brain implantable device may be the only thing that may prevent a patient from entering depression or experiencing and acting on suicidal ideations. Hence, these devices are critical and need fault-tolerance. In recent years, the design of brain implantable devices has also been driven by an increasing need for dense sensor arrays together with a need for a fully implantable signal monitoring and modulating circuitry that consumes low power (approx. few µWatts), occupies a small area (approx. few sq-mm) and has the ability to wirelessly communicate with the external environment while monitoring bio-potential signals in vivo. The rapid scaling of CMOS technology in recent years has assisted this need for a low area-power design criteria in becoming a reality. However, it has also added a fresh set of reliability issues to the existing implantable designs which surprisingly do not incorporate fault-tolerance strategies which are de rigueur for other critical engineering devices. This dissertation presents an argument for the inclusion of fault-tolerance in brain implantable devices to extend their dependability, and addresses the issue by proposing possible fault-tolerant designs for these devices. A systems approach has been adopted to achieve the proposed fault-tolerant designs for the brain implantable system. This system includes an array of electrodes also known as the Multi-electrode Array or MEA to sense the underlying neural activity and, an implantable electronic circuitry to process and transmit the captured neural activity to an external recording and monitoring unit. Such an implantable device can also possess the ability to stimulate neurons or deliver drugs locally based on feedback received from the external unit. A hardware redundancy approach has been employed to provide a possible long-term solution to resolve the reliability issues in such implantable systems that are chronically implanted for long periods of time. Two redundancy based solutions are proposed to improve the dependability of the brain implantable MEA. The first solution uses rows or columns of spare units to replace primary faulty sensors within the device. The second solution uses space redundancy with local reconfiguration capability. Here spare sensors are placed in interstitial sites and can replace neighboring primary faulty sensors. Different fault-tolerant solutions with varying degrees of redundancy and the equivalent graph models for these solutions are described. A maximum matching algorithm is described to match faulty primary to available spare modules for reconfiguration. Three fault-tolerant designs are proposed to increase the reliability and availability of the brain implantable device. The fault-tolerant designs are analyzed and compared in terms of the area occupied, the power consumed and the overall system reliability to a benchmark design proposed for future brain implantable designs. The performance of these solutions is analyzed under different fault conditions to characterize the dependability of a fault-tolerant implantable system as a function of the redundancy introduced. The area-power trade-off versus the degree of reliability included in the fault-tolerant device has been analyzed for a standard 0.18µm CMOS process. Results of the analyses demonstrate that a considerable improvement in the reliability of an implantable system can be achieved with a well-designed increase in redundancy.
Kakad, YogendraZaveri, HittenXie, Jiang (Linda)Mukherjee, ArindamMukherjee, Pinku
Thesis (Ph.D.)--University of North Carolina at Charlotte, 2015.
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