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Cache-Aware Implementation of Compressed Sensing Reconstruction using Walsh-Hadamard Transform on a Multicore Architecture
Title
Cache-Aware Implementation of Compressed Sensing Reconstruction using Walsh-Hadamard Transform on a Multicore Architecture
Author
Ramgopal, Aneesh
Date Created
2014
Description
The recent development of the compressed sensing (CS) theory has given rise to several algorithms being proposed for signal acquisition and reconstruction. Implementing these algorithms are computationally demanding and pose several challenges for...
Effective Data Parallel Computing on Multicore Processors
Title
Effective Data Parallel Computing on Multicore Processors
Author
Byun, Jong-Ho
Date Created
2010
Description
The rise of chip multiprocessing or the integration of multiple general purpose processing cores on a single chip (multicores), has impacted all computing platforms including high performance, servers, desktops, mobile, and embedded processors. Pr...
Thread Mapping Using System-Level Model for Shared Memory Multicores
Title
Thread Mapping Using System-Level Model for Shared Memory Multicores
Author
Mitra, Reshmi
Date Created
2015
Description
Exploring thread-to-core mapping options for a parallel application on a multicore architecture is computationally very expensive. For the same algorithm, the mapping strategy (MS) with the best response time may change with data size and thread c...